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Cadence Unveils Maestro, Domain-Specialized AI Models to Power Agentic Chip Design

agentic chip design

Cadence today announced the Maestro™ AI Model Portfolio. The new lineup powers Cadence® AI Super Agents across semiconductor and system design workflows. It also advances agentic chip design for engineering teams worldwide. Cadence pairs these models with reinforcement learning (RL) loops. It also connects them to its proven electronic design automation (EDA) and system design automation (SDA) tools. As a result, the company delivers a deeply integrated agentic engineering platform. The platform aims to improve results, accelerate time to market, and enhance performance through recursive self-improvement.

The Maestro technology gives customers a secure, Cadence-managed platform. It blends domain-specialized intelligence and expertise with the control, choice, and flexibility teams need to innovate with confidence. The portfolio spans multiple model sizes and architectures. It combines domain-specialized post-trained large language models (LLMs), trained decision models, and self-improving agent skills. Moreover, it integrates with Cadence AI Super Agents, including AuraStack™, ChipStack™, InnoStack™, and ViraStack™. Together with EDA and SDA tools, the portfolio blends frontier, open-weight, and domain-specialized models across cloud and on-premises environments.

“Revolutionizing complex engineering tasks requires deep domain-specialized intelligence,” said Anirudh Devgan, president and CEO at Cadence. “Combining our Maestro portfolio of domain-specialized models with leading frontier and open-weight models enables our AI Super Agents to drive Cadence EDA and SDA tools with exceptional skill and efficiency to transform chip and system design.”

NVIDIA also highlighted the collaboration. Tim Costa, vice president and general manager of industrial and computational engineering at NVIDIA, shared his view.

“Agentic chip design requires AI that can generate design content, evaluate tradeoffs and learn from verified engineering results,” said Tim Costa, vice president and general manager of industrial and computational engineering at NVIDIA. “Our collaboration with Cadence brings NVIDIA Nemotron, OpenShell and deep engineering expertise to Maestro’s domain-specialized models. By grounding reinforcement learning in feedback from EDA tools and deterministic solvers, we can teach agents to make better design decisions based on how well their work meets engineering objectives and constraints.”

Customers are already moving forward. Socionext is deploying the InnoStack AI Super Agent in its production design environment.

“We are deploying Cadence’s InnoStack AI Super Agent into our production design environment,” said Hisato Yoshida, COO of Socionext. “By combining agentic AI with advanced EDA tools for physical design, we expect up to 5X overall productivity gains while maintaining design quality. We see the Maestro portfolio as the next step in driving even greater efficiency across our design process.”

Silicon Labs has seen early benefits as well.

“Ultra-low power devices require innovation across disciplines. Agentic AI unlocks new power opportunities,” said Garima Sharda, vice president of engineering at Silicon Labs. “By leveraging the Cadence Verisium Debug as part of ChipStack AI Super Agent, our engineering teams have achieved acceleration in root-cause analysis and end-to-end debug during pre-silicon low power verification. We look forward to realizing further benefits through Cadence’s Maestro domain-specialized models.”

A Self-Improving Learning Environment for Engineering AI

Initial design-workflow results look promising. Cadence reports up to 30% improvement in quality of results. It also reports up to 5X greater token efficiency versus a general-purpose foundation model. These gains come from a vertically integrated learning environment. The environment combines Cadence domain knowledge, curated engineering datasets, AI Super Agents, EDA and SDA tools, and evaluation harnesses. Furthermore, Cadence’s principled algorithms and deterministic solvers check outputs against engineering objectives, constraints, and ground truth. This process creates closed, verified feedback loops for reinforcement learning and recursive improvement.

Domain Intelligence with Intelligent Model Choice

The Cadence learning environment unifies complementary AI capabilities in a single workflow. Frontier and open-weight models offer broad language, reasoning, and multimodal capabilities. Meanwhile, the Maestro AI Model Portfolio adds domain expertise for complex chip and system design. Given a high-level objective, Cadence AI Super Agents interpret design intent and decompose tasks. They then orchestrate Maestro with other leading frontier and open-weight models. Finally, they drive Cadence EDA and SDA tools.

The combined solution interprets specifications, generates design content, and analyzes results. It also evaluates tradeoffs and guides decisions based on engineering requirements, cost, and security. In addition, customers can post-train the Maestro portfolio, including NVIDIA Nemotron and other models, on proprietary data, designs, and workflows. By balancing EDA and SDA tool calls with LLM invocations, the portfolio significantly reduces token usage. At the same time, it maintains execution efficiency. The secure architecture supports cloud and customer-controlled on-premises deployment, which strengthens agentic chip design at scale.

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News Source: Businesswire.com